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? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control july 2012 FAB3103 2.3 watt class-d audio amplifier with integrated boost regulator and automatic gain control features ? high output, low distortion class-d mono speaker amplifier o 2.3w into 8 ? from 3.6v supply (10% thd+n) o 1.85w into 8 ? from 3.6v supply (1% thd+n) o 0.01% thd+n into 8 ? (100mw) ? high-efficiency boost regulator provides higher output power over li-ion battery voltages o 85% total efficiency (3.6v, 8 ? , p o = 1.0w) ? adaptive boost shutdown at lower output power increases efficiency and reduces quiescent current consumption: o i dd = 2.7ma from 3.6v supply ? automatic gain control (agc) monitors battery voltage and dynamically adjusts gain, extending battery runtime ? reduced noise floor enhances audio playback o 38v output noise (a-weighted) o 100db snr (a-weighted) ? low-emi design allows filterless operation ? high-power supply ripple rejection: o 88db psrr (f ripple = 217hz, boost enabled) o 70db psrr (f ripple = 217hz, boost bypassed) ? high noise rejection using differential audio inputs: o 75db cmrr (f in = 1khz) o 71db cmrr (f in = 217hz) ? short-circuit protection ? under-voltage protection ? ?click and pop? suppression ? available in 12-bump, 0.5mm pitch, wlcsp o space-saving 1.86mm x 1.44mm package description the FAB3103 is a mono class-d audio amplifier with an integrated boost regulator that achieves high output audio over a power supply range of 2.5v to 5.2v. automatic boost shutdown dynamically shuts down the boost regulator at low output power for greater efficiency and lower quiescent current consumption. automatic gain control (a gc) monitors the battery and reduces gain as the battery voltage drops to limit maximum current consumption, extending battery runtime and preventing mobile device shutdown. applications ? smart phones, feature phones ? tablets, portable gaming devices ? gps, active speakers figure 1. typical application circuit ordering information part number operating temperature range package packing method FAB3103ucx -40c to +85c 12-bump, 0.5mm pitch, wafer-level chip-scale package (wlcsp) 3000 units on tape & reel
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 2 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control pin configuration figure 2. pin assignments (top view) pin definitions wlcsp name type description b1 out+ output positive audio output c1 out- output negative audio output c3 in+ analog input positive audio input d3 in- analog input negative audio input c2 en cmos input shutdown signal for boost regulator and amplifier: vbatt=enabled, pgnd=shutdown (internal 300k ? pull-down) b2 agct analog input agc trip-point setting b3 vbatt power supply voltage a2 sw power boost regulator switching node a1 pvdd power boost regulator output a3 bgnd ground boost regulator ground ? conne ct to pgnd and agnd with a ground plane. d1 pgnd ground power ground ? connect to bgnd and agnd with a ground plane. d2 agnd ground analog ground ? connect to bgnd and pgnd with a ground plane.
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 3 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and st ressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recomm ended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v batt voltage on vbatt pin -0.3 6.0 v v out voltage on out-, out+ pins -0.3 v bstout + 0.3 v v in voltage on in+, in-, sw, en, agct pins -0.3 v batt + 0.3 v v indiff differential voltage across in+, in- pins while enabled -1.5 1.5 v rms p d power dissipation internally limited dissipation ratings symbol parameter min. typ. max. unit t j junction temperature 150 c t stg storage temperature range -65 150 c t l lead temperature (soldering, 10s) 300 c ? ja thermal resistance, jedec standard, multilayer test boards, still air 77 c/w electrostatic discharge protection symbol parameter condition level unit esd human body model (hbm) eia/jesd22-a114 3 kv charged device model (cdm) according to "eia/jesd22-c101 level iii" compatible with "iec61340-3-3 level c4" or "esd-stm5.3.1-1999 level c4" 1 kv recommended operating conditions the recommended operating conditions table defines th e conditions for actual device operation. recommended operating conditions are specified to en sure optimal performance to the datash eet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. typ. max. unit t a operating temperature range -40 85 c v batt vbatt supply voltage range 2.5 5.2 v l sw inductor (at peak inductor current: 1.5a) 1.4 (1) 2.2 h c vbatt vbatt capacitor 4.7 (1) 10.0 f c pvdd pvdd capacitor 6.8 (1) 22.0 f c agct capacitive load on agct 10 pf r l load resistance 6 (2) 8 ? notes: 1. capacitors experience degradation over time and this is accelerated with increased temperature. it is therefore recommended to use the stated typical values. 2. the FAB3103 is optimized to drive an 8 ? speaker impedance. the 8 ? speaker should remain at 6 ? over the entire audio frequency range.
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 4 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control electrical characteristics unless otherwise noted: agct=gnd, r l =8 ? + 33h, f=1khz, and audio measurement bandwidth=22hz to 20khz (aes17). typi c al values are at v batt =3.6v, t a =25c, with typical external component values. symbol parameter conditions min. typ. max. unit i dd quiescent current inputs ac grounded, en=high 2.7 ma i sd shutdown current en=pgnd, inputs ac grounded 0.1 2.0 a t wu wake-up time from low to high en transition to full operation 5 12 ms f sw(amp) class-d switching frequency 300 khz v os differential output offset voltage inputs ac grounded 1.67 5.00 mv a v gain agc inactive 9.5 10.0 10.5 v/v r in input resistance gain=10v/v (agc inactive) differential 24 30 36 k ? single-ended 12 15 18 r std single-ended input impedance during shutdown en=pgnd, ac-coupled inputs, v inx < 2v rms per input 80 k ? v std maximum single-ended input voltage swing during shutdown en=pgnd, ac-coupled inputs 2 v rms thd+n added to audio signal at inputs during shutdown en=pgnd, ac-coupled inputs, source impedance < 1 ? 0.02 % thd+n total harmonic distortion plus noise p out =100mw 0.01 % p out =500mw 0.02 p o output power thd+n 10% 2.3 w thd+n 1% 1.85 i dlmt class-d output current limit 1.4 a psrr power supply rejection ratio inputs shorted, ac grounded, output referred; v ripple =200mv p-p square centered around v batt =3.8v, 50% duty cycle, 10s rise/fall time f ripple =1khz, boost enabled 85 db f ripple =217hz, boost enabled 88 f ripple =1khz, boost bypassed 77 f ripple =217hz, boost bypassed 70 cmrr common-mode rejection ratio output referred, v ripple =200m v p-p square, 50% duty cycle, 10s rise/fall time, inputs shorted and ac-coupled to v ripple f ripple =1khz 75 db f ripple =217hz 71 v bias in+, in- bias voltage 1.2 v ? efficiency r l =8 ? + 33h , p out =1.0w 85 % snr signal-to-noise ratio p out =1.85w, a-weighted 100 db p out =1.85w, unweighted 97 continued on the following page...
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 5 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control electrical characteristics unless otherwise noted: agct=gnd, r l =8 ? + 33h, f=1khz, and audio measurement bandwidth=22hz to 20khz (aes17). typi c al values are at v batt =3.6v, t a =25c, with typical external component values. symbol parameter conditions min. typ. max. unit e n output noise a-weighted 38 v rms unweighted 51 t std thermal shutdown junction temperature 165 c t hys thermal shutdown hysteresis junction temperature 25 c v ulvo v batt under-voltage shutdown 1.8 2.1 2.3 v v hys v batt under-voltage hysteresis 120 300 mv f sw(reg) boost converter switching frequency 1.2 mhz i limit(su) boost converter inrush current limit pv dd rising from 0v to v batt 600 ma t inrush boost converter inrush time pv dd rising from 0v to v batt 1000 s auto boost startup current ramp rate pv dd rising from v batt to 5.6v 15 ma/s i boost boost converter peak input current limit open-loop limit 1100 1600 2100 ma v bstout boost converter output vo ltage 5.55 5.65 5.75 v v bststd auto boost shutdown threshold voltage 2 v pk t hold auto boost shutdown hold time 125 ms v agc agc trip point agct=floating 3.190 3.250 3.283 v agct=gnd 3.480 3.550 3.586 agct=vbatt 3.680 3.750 3.788 output power with agc agct=gnd, v in =0.4v pk , 1khz sine wave v batt =3.4v 0.79 w v batt =3.0v 0.45 t a agc attack time 20 s/db t r agc release time 1600 ms/db agc step size 0.5 db agc maximum attenuation 10 db v ih en logic input high voltage 1.1 v v il en logic input low voltage 0.45 v c in en capacitance 10 pf r pd en pull-down resistance 300 k ?
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 6 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control typical performance characteristics unless otherwise noted: agct = gnd, r l = 8 ? + 33h, f = 1khz, audio measurement bandwidth 22hz to 20khz (aes17), v batt = 3.6v, t a = 25c, typical external component values. figure 3. quiescent supply current vs. supply voltage figure 4. a -weighted output noise vs. frequency figure 5. total harmonic distortion + noise vs. output power figure 6. total harmonic distortion + noise vs. frequency figure 7. supply current vs. output powe r figure 8. efficiency vs. output powe r 2 2.5 3 3.5 4 4.5 5 2.5 3 3.5 4 4.5 5 5.5 supply current (ma) supply voltage (v) inputs ac grounded -150 -140 -130 -120 -110 -100 -90 -80 02468101214161820 amplitude (dbv) frequency (khz) inputs ac grounded 0.01 0.1 1 10 0.001 0.01 0.1 1 10 thd+n (%) output power (w) vbatt=4.8v vbatt=4.2v vbatt=3.6v vbatt=2.8v f = 1khz 0.001 0.01 0.1 1 10 10 100 1000 10000 thd+n (%) frequency (hz) po = 100mw po = 1w 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.0 0.5 1.0 1.5 2.0 2.5 supply current (a) output power (w) vbatt = 4.2v vbatt = 3.6v vbatt = 2.8v f = 1khz 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 efficiency (%) output power (w) vbatt=4.2v vbatt=3.6v vbatt=2.8v f = 1khz
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 7 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control detailed description signal path the FAB3103 features a fully differential signal path for noise rejection. the low-emi design allows the out+ and out- pins to be connected directly to a speaker without an output filter. the input section includes an 80khz low-pass filter for removing out-of-band noise from audio sources, such as sigma delta dacs. shutdown if en is grounded, the class-d amplifier and the boost regulator are turned off. in+ and in- are high impedance. audio signals present at in+ and in- with amplitude less than the maximum differential input voltage swing are not dist orted by the FAB3103 ( see electrical characteristics ). when en transitions from low to high during the wake-up time (see electrical characteristics), the FAB3103 charges the input dc blocking capacitors to the common mode voltage before enabling the class-d amplifier. to minimize click and pop during turn-on, audio signals should not be present during the wake-up period. other devices that are connected to the same input signal, if not muted, may experience a pop due to this capacitor charging. there is no limitation on the length of shutdown. remaining charge on the pvdd capacitor at startup (for example, if en is low for only a short period) does not affect startup behavior. the en pin has an internal 300k ? pull-down resistor. en must be low when v batt is lower than the v batt under-voltage shutdown voltage (see electrical characteristics) . en must remain low for at least 100 s after v batt rises above the v batt under-voltage shutdown voltage. class-d amplifier over-current protection if the output current of t he class-d amplifier exceeds limits (see the electrical characteristics) , the amplifier is disabled for approximately one second. (other systems, such as the boost regulator and agc, remain active.) after one second, the amplifier is re-enabled. if the fault condition still exists, the amplifier is disabled again. this cycle repeats until the fault condition is removed. speaker size the FAB3103 was designed for use with small speakers found in mobile applications. the back emf in larger speakers can cause pvdd to peak above safe levels. to check safe operation, monitor pvdd while driving a dynamic signal (such as music) at maximum levels. if pvdd peaks above 6.2v, connect a 6v zener diode between pvdd and pgnd. low emi to minimize emi, edge-rate control for the boost regulator and class-d amplifier can be employed. the boost regulator's edge-rate control is disabled by default. for devices with 20ns boost edge rates or 10ns boost edge rates, contact a fairchild representative. this is a factory option that cannot be changed in the application, but is available from fairchild. the class-d amplifier's edge-rate control is disabled by default. for devices with 20ns class-d edge rates, contact a fairchild representative. this is a factory option that cannot be changed in the application, but is available from fairchild.. automatic boost shutdown automatic boost shutdown changes the class-d amplifier supply voltage as a function of audio output level. at audio output levels above 2v pk , the boost converter generates 5.65v from the input battery voltage. if the output level is below 2v pk for more than 125ms, the boost converter is switched off and the class-d amplifier is supplied directly from the battery. as a result, efficiency is improved at low audio output levels and quiescent current consumption is reduced. figure 9 shows an example of an auto boost startup event. at first, the boost converter is off and pvdd is the same voltage as vbatt. at 20s, a large audio signal is presented at th e inputs, which causes the boost converter to start up. from 20s to 120s, battery current is ramped up. the auto boost startup current ramp rate is 15ma/s. this ramp is enforced to avoid sudden current draw spikes from the battery. at 120s, after pv dd has reached the boost converter output voltage, the ramp is released and battery current falls to a level capable of sustaining the speaker amplifier?s outputs. at 160s, the input signal begins to rise, which increases battery current. at 180s, the boost converter peak input current limit is enforced and battery current levels off, which causes pv dd to droop. the boost regulator should not be used to drive any loads other than the class-d amplifier.
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 8 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control figure 9. auto boost startup automatic gain control due to constant output powe r, the amount of vbatt current needed to maintain a given output amplitude is inversely proportional to vbatt voltage. this produces very large current requirements at low v batt . the agc eases low-v batt current demands by reducing the gain when vbatt voltage drops below a trip point. one of three different trip points may be selected by shorting agct to vbatt, shorting agct to pgnd, or floating agct (see electrical characteristics) . the trip point is determined upon power-on and when en transitions from low to high. if agct is changed during operation, the new va lue is not read until power or en is cycled. when v batt is above the trip point, the agc has no effect on the signal path. when v batt is at or below the trip point, target gain is reduced in 0.5db steps according to the equation: ? ? ? ? ? ? ? ? ? ? ? max arg out batt t i l i et t v v v g s g g (1) where: g i = initial gain (10v/v); s l = 3v/v slope; v outmax = 5.2v; v t = agc trip point set by the agct pin; and v batt = voltage at the vbatt pin. target gain can be reduced by as much as 10db. note that the stat e of auto boost shutdown has no effect on the agc. figure 10 shows target gain vs. battery voltage. 0 0.2 0.4 0.6 0.8 0 20 40 60 80 100 120 140 160 180 200 v in (v) 0.0 2.0 4.0 6.0 0 20 40 60 80 100 120 140 160 180 200 pv dd (v) 0.0 0.5 1.0 1.5 2.0 2.5 0 20 40 60 80 100 120 140 160 180 200 battery ? current ? (a) time ? (s) boost ? converter ? peak ? input ? current limit
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 9 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control line color agct configuration agc trip point (v) red float 3.25 green ground 3.55 blue v batt 3.75 figure 10. target gain vs. battery voltage figure 11 is similar to figure 10 except that the target gain is expressed in db rather than v/v. line color agct configuration agc trip point (v) red float 3.25 green ground 3.55 blue v batt 3.75 figure 11. target gain vs. battery voltage figure 12 shows examples of peak output voltage vs. battery voltage. line color agct configuration agc trip point (v) input voltage (v p k ) magenta float 3.25 0.3 cyan ground 3.55 0.3 black v batt 3.75 0.3 figure 12. output voltage vs. battery voltage figure 13 shows examples of output power vs. battery voltage with a 0.4v pk sinusoidal input signal. line color agct configuration agc trip point (v) input voltage (v p k ) magenta float 3.25 0.3 cyan ground 3.55 0.3 black v batt 3.75 0.3 figure 13. output power vs. battery voltage examples (v in =0.4v pk sine) the speed at which gain can change is limited (see electrical characteristics) ; therefore, the actual gain may lag the target gain if v batt voltage changes quickly. figure 14 and figure 15 show examples of agc changes over time. in these examples, agct is grounded, so the agc trip point is 3.55v. 1. initially, v batt is 3.6v and gain is 10v/v (20db). 2. a narrow v batt drop of less than 2s is ignored by the agc. 3. the next v batt drop lasts longer and the agc is tripped. the initial 0.5db gain reduction occurs 3.9s after v batt crosses below the 3.55v trip point. 4. v batt is now 3.1v, so target gain is 10v/v ? 3v/v 10v/v [(3.55v ? 3.1v) / 5.2v]=7.40v/v=17.4db. 5. gain continues to drop by 0.5db every 10 s until it is below the target gain, where it settles at 17.0db. 6. when v batt rises above the trip point, gain increases by 0.5db. if more than 800ms has passed since the last gain change, gain rises immediately, as shown in figure 14. otherwise, gain does not rise until after 800ms has passed, as shown in figure 15. 7. while v batt remains above the trip point, gain continues to increase by 0.5db every 800ms until it returns to 20db. the intent of the agc circuitr y is to limit current draw from the battery to extend runtime. this is particularly important for handsets that incorporate advanced shutdown algorithms to measure battery voltage. the agc circuit dynamically adjusts the amplifier gain based on the trip point used. even t hough the amplifier gain is reduced in response to lower battery voltages, two conditions result in continued higher current draw: 1) the handset volume is turned up in an attempt to maintain the same loudness, or 2) the input signal is increased. if 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 2.5 3.0 3.5 4.0 4.5 5.0 target ? gain ? (v/v) v batt (v) 8 10 12 14 16 18 20 2.5 3.0 3.5 4.0 4.5 5.0 target ? gain ? (db) v batt (v) 0.5 1 1.5 2 2.5 3 3.5 2.5 3.0 3.5 4.0 4.5 5.0 v out (v pk ) v batt (v) v in = ? 0.3v pk 0.0 0.2 0.4 0.6 0.8 1.0 2.5 3.0 3.5 4.0 4.5 5.0 p out (w) v batt (v) r l = ? 8 ? + ? 33 h
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 10 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control one or both of these conditions exist, even though the amplifier gain is reduced in response to lower battery voltage, current draw re mains elevated, eventually resulting in handset shutdown. figure 14. agc changes vs. time, example 1 figure 15. agc changes vs. time, example 2
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 11 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control applications information layout considerations general layout and supply bypassing play a major role in analog performance and thermal characteristics. fairchild offers an evaluation board to guide layout and aid device evaluation. contac t a fairchild representative for information about evaluation boards. following the recommended layout configuration (shown in figure 16) provides optimum performance for the device. for best results, follow the steps and recommended routing rules listed below. recommended routing / layout rules ? do not run analog and digital signals in parallel. ? traces must run on top of the ground plane. ? avoid routing at 90 angles. ? place bypass capacitors within 2.54mm (0.1 inches) of the device power pin. ? minimize all trace lengths to reduce series inductance. ? connect bgnd, pgnd, and agnd together using a single ground plane. figure 16. recommended pcb layout table 1 ? recommended passive components component vendor part number value l sw murata lqm2hpn2r2njcl 2.2h c pvdd murata grm21ar60j226ue80k 22f c vbatt murata grm188r60j106ue82j 10f
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 12 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control physical dimensions figure 17. 12-ball wlcsp, 3x4 array, 0.5mm pitch, 250m ball product dimensions product d e x y FAB3103ucx 1.86mm 1. 44mm 0.22mm 0.18mm package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent version. package s pecifications do not expand fairchild?s worldw ide terms and conditions, specifically t he warranty therein, which covers fairchild products. always visit fairchild semiconductors on line packaging area for the most recent packaging drawings and tape and reel specifications. http://www.fairchildsemi.com/packaging/ . top view bottom view recommended land pattern (nsmd) 0.03 c 2x (x)+/-.018 b a 1 2 a b c 0.03 c 2x 0.005 cab 0.50 0.50 3 d side views 12x ?0.260 0.02 seating plane 0.625 0.547 0.2080.021 0.3780.018 d c 0.06 c 0.05 c pin 1 area d e notes: a. no jedec registration applies. b. dimensions are in millimeters. c. dimensions and tolerance per asme y14.5m, 1994. d. datum c is defined by the spherical crowns of the balls. e. package nominal height is 586 microns 39 microns (547-625 microns). f. for dimensions d, e, x, and y see product datasheet. g. drawing filname: mkt-uc012aerev1 f f (?0.300) solder mask opening (?0.200) cu pad 0.50 0.50 1.50 a1 e (y)+/-.018 f f
? 2011 fairchild semiconductor www.fairchildsemi.com FAB3103 ? rev. 1.0.2 13 FAB3103 ? 2.3 watt class-d audio amp lifier with integrated boost regu lator and automatic gain control

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